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Vasudev Gohil

Thanks for visiting! Explore my site to learn more about me, my background, and what I have to offer. If you have questions or would like to discuss an opportunity to work together, feel free to get in touch.

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About

Background

I am a doctoral student in the Department of Electrical and Computer Engineering at Texas A&M University. I work on application of machine learning for hardware chip design and hardware security under the guidance of Dr. JV Rajendran. Before this, I did my undergraduate in the Department of Electrical Engineering at IIT Gandhinagar. You can find my short resume here: Resume.

Research Interests

  • Machine Learning: Reinforcement Learning and Large Language Models

  • ML for Chip Design and Hardware Security

  • Embedded Systems Security

  • Intellectual Property Protection

  • Security of Integrated Circuits Supply Chain

Awards

  • Travel Awards: ACM SIGDA Travel Grant to attend Student Research Competition at ICCAD, 2023; Design Automation Conference Young Fellows program, 2023; IEEE HOST Student Travel Grant, 2023; Texas A\&M University ECEN Graduate Student Travel Grant, 2022; USENIX Security Grant for attending conference, 2021; IEEE HOST Student Travel Grant for attending conference, 2020 

  • One Time ECEN Departmental Scholarship, 2018

  • Academic Excellence Scholarship for securing top position at IIT Gandhinagar, 2014-2015

  • Dean's List at IIT Gandhinagar, 2014-2015

Awards

News

News
Publications

Publications

* Equal Authorship

Software

  • AttackGNN: Supporting material for our RL-based adversarial example generation work at USENIX Security 2024
  • ATTRITION: Supporting material for our RL-based Trojan insertion work at CCS 2022
  • DETERRENT: Supporting material for our RL-based Trojan detection work at DAC 2022
Software
Experience

Experience

Graduate Research Assistant 
ECEN Department
Texas A&M University

August 2018 - Present

I work as a research assistant at the intersections of machine learning, specifically RL and LLMs, chip design, and hardware security. My work is primarily focused on applying machine learning to improve the chip design process as well as increase the security of the IC supply chain by designing solutions to thwart reverse engineering, intellectual property piracy, and hardware Trojan insertion.

Technical Intern 
Silicon Realization Group
Synopsys

May 2022 - August 2022

I worked as a technical intern in the DSO.ai team in the Silicon Realization Group of Synopsys. I worked on the DSO.ai tool, the EDA industry's first autonomous artificial intelligence application for chip design. I assisted team members in their tasks and performed experiments to improve DSO.ai.

Research Intern 
ECEN Department
Texas A&M University

May 2017 - July 2017

I contributed to an ongoing project in Dr. Shakkottai's research group. I helped modify and develop appropriate decision trees for QoS to QoE mapping with the help of machine learning methods.

Summer Research Intern 
IIT Gandhinagar

May 2016 - July 2016

I contributed to an ongoing project in Dr. Chakraborty's research group. Initially, I performed a thorough literature review, and eventually, I worked with a Fiber Bragg grating as a pressure sensor.

Education

Education

Ph.D. in Computer Engineering
Texas A&M University, College Station

August 2018 - Present

B. Tech in Electrical Engineering

IIT Gandhinagar

July 2014 - August 2018

Contact

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